Vacatures 41 tot 50 van 53 (ontdubbeld 51)
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European Tech Recruit - Vught
data transfer, pushing the boundaries of what’s possible with both chip and IP technology. As a Senior Logic IP Designer , you will lead the design of secure silicon IP, including RTL design, clock domain crossing (CDC) analysis- Volledige vacature bekijken
NLwerkt - Veldhoven
Firmware designer responsibilities:- The FPGA Designer reports to the Group Manager Electronics EUV or delegated Team Leader. Participate as an FPGA Firmware designer in a multidisciplinary design team. Define and document- Volledige vacature bekijken
Yacht - Veldhoven
Firmware designer responsibilities:- The FPGA Designer reports to the Group Manager Electronics EUV or delegated Team Leader. Participate as an FPGA Firmware designer in a multidisciplinary design team. Define and document- Volledige vacature bekijken
Yacht via Talent - Veldhoven
Firmware designer responsibilities:- The FPGA Designer reports to the Group Manager Electronics EUV or delegated Team Leader. Participate as an FPGA Firmware designer in a multidisciplinary design team. Define and documentRambus via Talent - Vught
knowledge of SoC, Silicon IP and/or FPGA logic design flowsIn depth knowledge of hardware description languages (Verilog, VHDL, SystemVerilog) and scripting languagesIn depth knowledge of cryptography, security protocols and securityInternship or Graduation Workboats
Damen Holding via Talent - Gorinchem
the expected functional behavior of the power management system for a DC power distribution system (DC PMS). Such a model would help us to analyse and define the required logic for a DC PMS considering different type of power