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Lead Engineer DBA Oracle

Schiphol Group - Schiphol
Nice to know (you) Als Lead Engineer DBA Oracle help jij mee aan het bepalen van de database visie voor Schiphol om zo de autonooms airport te realiseren. Je krijgt de kans om te schitteren in een dynamische omgeving en het
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Lead Engineer SQL

Schiphol Group - Schiphol
Nice to know (you) Als Lead Engineer SQL help jij mee aan het bepalen van de database visie voor Schiphol om zo de autonooms airport te realiseren. Je krijgt de kans om te schitteren in een dynamische omgeving en het
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Immersion Engineer

BAM Infraconsult - Gouda
We are looking for an immersion Engineer for the 20km long Fehmarn Belt Tunnel Project (Danmark). As an immersion engineer , you will participate in the team responsible for floating up and/or hoisting the approx. 90 concrete
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Embedded Hardware (ASIC / FPGA) IP Support Engineer

IC Resources via Jobsonline - Eindhoven
hardware description languages (Verilog, VHDL , SystemVerilog), scripting languages and SoC, Silicon IP and/or FPGA design /verification flows Excellent analytical and problem-solving skills Excellent communication skills
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Graduate FPGA Engineer

Optiver - Amsterdam
range of products from listed derivatives to cash equities, ETFs, bonds and foreign exchange. WHAT YOU'LL DO: As a Graduate FPGA Engineer , you’ll work in a team of FPGA Hardware and Software Engineers to design and
PART_TIME - Opslaan

Virtual Platform R&D Engineer

You will do via Academic Positions
Baan opslaan Work as Virtual Platform R&D Engineer in imec’s center of excellence for hardware-software co- design for future compute systems. What you will do Compute system architecture (CSA) is a center of
19 dagen geleden - Preview - Opslaan

FPGA Internship (Summer

Optiver - Amsterdam
strong engineering instincts and academic experience in digital design with FPGAs or ASICs Experienced in writing hardware in VHDL , Verilog or SystemVerilog Passionate for clean code, simple well-architected systems and
PART_TIME - Opslaan

Senior Hardware Engineer

Fhi - Leusden
communication skills in both Dutch and English. A prerequisite is knowledge of embedded software, vhdl , simulation software, RF technology, design tools such as Altium. What do we offer? A salary that matches the
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ASIC Design Engineer

Optiver - Amsterdam
disciplined and scientific approach to engineer simple, well-architected solutions that meet the dynamic needs of our traders. Our passion is to solve problems which really matter to the business, and we take great pride in the quality
INTERN - Opslaan

Firmware Design Engineer VHDL FPGA Trinamics

Trinamics Beheer via Jobsonline - Breda
designing programmable logic firmware. Proficiency in VHDL design language. Strong technical knowledge of programmable logic and digital design .
FULL_TIME - Preview - Opslaan

FPGA Engineer (Xilinx/VHDL) Trinamics

Trinamics Beheer via Jobsonline - Breda
23-10-2024 Design and develop digital logic using VHDL for Xilinx FPGAs. Write clean, efficient, and well-documented VHDL code. Perform simulations to verify the functionality and timing constraints of FPGA
FULL_TIME - Preview - Opslaan

FPGA Engineer Intern (Summer Chicago)

Optiver - Amsterdam
instincts and academic experience in digital design with FPGAs or ASICs Experienced in writing hardware in VHDL , Verilog, or System Verilog Passionate about clean code, simple, well-architected systems, and continuous
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Graduate FPGA Engineer Start Austin)

Optiver - Amsterdam
Engineer , you’ll work on a team of FPGA and Software Engineers to design and maintain our proprietary systems with the goal of finding the simplest solutions to the most complex problems. In this role, you will: Accelerate
PART_TIME - Opslaan

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